PHYS 287 |
| For the beyond-CMOS era, self-assembly is expected to play a major role, allowing further down-scaling, more ideal device performance, and still with reductions in fabrication costs. In this presentation I will give an update on the status of growth of 10nm-scale semiconductor nanowires based on a combination of top-down patterning and bottom-up growth and assembly of nanowires, including designed heterostructures for added functionalities. I will concentrate on III-V nanowires with a special interest in the ability to integrate such devices with Si-technology. Such 1D heterostructure systems have allowed studies of basic transport and optics physics as well as allowed the development of devices for electronics and photonics. I will, as example, describe wrapped insulator-gate field-effect transistors (WIGFETs), fabricated as dense arrays of epitaxially grown nanowire transistor devices for which gate-lengths down to 50nm have been reached. Other examples or nanowire applications, such as for memories and for light-emitting devices, will also be described. This research is performed within the Nanometer Structure Consortium at Lund University and within the EU-project NODE (“Nanowire-based One-Dimensional Electronics”). |
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Nanostructured Materials
1:20 PM-5:00 PM, Wednesday, April 9, 2008 Morial Convention Center -- Rm. 338, Oral
Division of Physical Chemistry |